mean,mode and variance

corelation==>x is independent  y is dependent
Regression==>x is dependent y is independent


  • Normal distributions are symmetric, unimodal, and asymptotic, and the mean, median, and mode are all equal.

mean(xbar) == avg. of numbers/n;
variance(sigma^2)== summation(x-xbar)^2/n;
sd(sigma)==sqrt(varinace)


Another name for the mean of a probability distribution is expected value
  • Adding a constant to each value in a data set does not change the distance between values so the standard deviation remains the same.

  • Three of the most popular methods of estimation are: The method of moments (MM) The method of maximum likelihood (ML) Bayesian method
  • Regression is a data mining technique used to predict a range of numeric values (also called continuous values), 
  • The histogram for the data: 4; 5; 6; 6; 6; 7; 7; 7; 7; 8 is not symmetrical. The right-hand side seems "chopped off" compared to the left side. A distribution of this type is called skewed to the left because it is pulled out to the left.
  • M(t) = [(1 – p) + pet]n.moment generating formula for binomial distribution
  • standrad error::This means that every data value is equal to the mean. This result along with the one above allows us to say that the sample standard deviation of a data set is zero if and only if all of its values are identical.

Comments

Post a Comment

Popular posts from this blog

ARM VS AVR

ARM7TDMI:thumb2 instruction set it is 2 bytes  some 4 bytes thumb2 arm+thumb total 37 registers R0-R15 general purpose R13 stack R14 Link(  lr (or r14) is used as a link  register  to  store  the  return address ) by default data abort is handled when an application  read or write an illegal memory location. You can calculate the illegal memory location using by subtracting 8 from the value in R14 (link register). Exceptions  are processed in ARM state The  SWI  instruction causes a  SWI  exception. This means that the processor state changes to  ARM , the processor mode changes to Supervisor, the CPSR is saved to the Supervisor Mode SPSR, and execution branches to the  SWI  vector ARMCM3: two states *debug state *thumb state 16 registers 13 GP 3 special purpose The ARM7TDMI core has a Von Neumann architecture, with a single 32-bit data bus carrying both instructions and data. Th...
Read more

Basic Electronics

Image
This is a band pass filter In band stop filter C2 is connected in between R1 and C1 (Requires inverting input) Low pass filter High Pass filter (LPF and HPF requires differential input) differentiation and integrator ADDER Subtractor (for integrator, differentiator,adder,subtractor requires inverting input) Diode logic Resistor transistor logic: dissipates more power 1}DCTL(direct coupled transistor logic):it is used for to save space 2}Resistor capacitor transistor logic:input resistor are parallel with capacitors Emitter coupled Logic: it uses NPN transistor in differential amplifier range of input voltages are used so BJT will not goes into saturation region it is due to very high switching speed  also called common mode logic or current switch emmiter follower  CMOS: it utilize power during transition in logic so it uses very less power Power Scale::P=@cv^2.....@ is activity factor CMOS have speed limitation due to in...
Read more

RTOS(Real Time Operating System) notes

RTOS NOTES Hard realtime OS has less jitter and Soft real time jitter has High jitter  jitter : it is the time between two interrupt Event driven systems switch between tasks based on their priorities while time sharing systems switch the task based on clock interrupts. Most RTOS’s use a pre-emptive scheduling algorithm. The most common designs are Event-driven –  switches tasks  only when an event of higher priority needs servicing; called  preemptive priority , or priority scheduling. Time-sharing – switches tasks on a regular clocked interrupt, and on events; called  round robin . A task has three stages 1. Runing 2.Ready 3.Blocked(Waiting for an event,I/O for example) On simpler non-preemptive but still multitasking systems, a task has to give up its time on the CPU to other tasks, which can cause the ready queue to have a greater number of overall tasks in the ready to be executed state ( resource starvation ). laxity = Absolute deadline...
Read more