communication protocols( UART, SPI, I2C)

FeaturesUARTSPII2C
Full FormUniversal Asynchronous Receiver/TransmitterSerial Peripheral InterfaceInter-Integrated Circuit
Interface DiagramUART interface diagramSPI interface diagramI2C interface diagram
Pin DesignationsTxD: Transmit Data
RxD: Receive Data		SCLK: Serial Clock
MOSI: Master Output, Slave Input
MISO: Master Input, Slave Output
SS: Slave Select		SDA: Serial Data
SCL: Serial Clock
Data rateAs this is is asynchronous communication, data rate between two devices wanting to communicate should be set to equal value. Maximum data rate supported is about 230 Kbps to 460kbps.Maximum data rate limit is not specified in SPI interface. Usually supports about 10 Mbps to 20 MbpsI2C supports 100 kbps, 400 kbps, 3.4 Mbps. Some variants also supports 10 Kbps and 1 Mbps.
DistanceLower about 50 feethighestHigher
Type of communicationAsynchronousSynchronousSynchronous
Number of mastersNot ApplicationOneOne or more than One
ClockNo Common Clock signal is used. Both the devices will use there independent clocks.There is one common serial clock signal between master and slave devices.There is common clock signal between multiple masters and multiple slaves.
Hardware complexitylesserlessmore
ProtocolFor 8 bits of data one start bit and one stop bit is used.Each company or manufacturers have got their own specific protocols to communicate with peripherals. Hence one needs to read datasheet to know read/write protocol for SPI communication to be established. For example we would like SPI communication between microcontroller and EPROM. Here one need to go through read/write operational diagram in the EPROM data sheet.It uses start and stop bits. It uses ACK bit for each 8 bits of data which indicates whether data has been received or not. Figure depicts the data communication protocol.
I2C data communication protocol
Software addressingAs this is one to one connection between two devices, addressing is not needed.Slave select lines are used to address any particular slave connected with the master. There will be 'n' slave select lines on master device for 'n' slaves.There will be multiple slaves and multiple masters and all masters can communicate with all the slaves. Upto 27 slave devices can be connected/addressed in the I2C interface circuit.
Advantages• It is simple communication and most popular which is available due to UART support in almost all the devices with 9 pin connector. It is also referred as RS232 interface. •It is simple protocol and hence so not require processing overheads.
 •Supports full duplex communication.
 •Due to separate use of CS lines, same kind of multiple chips can be used in the circuit design.
 •SPI uses push-pull and hence higher data rates and longer ranges are possible.
 •SPI uses less power compare to I2C 		 •Due to open collector design, limited slew rates can be achieved.
 •More than one masters can be used in the electronic circuit design.
 •Needs fewer i.e. only 2 wires for communication.
 •I2C addressing is simple which does not require any CS lines used in SPI and it is easy to add extra devices on the bus.
 •It uses open collector bus concept. Hence there is bus voltage flexibity on the interface bus.
 •Uses flow control. 
Disadvantages• They are suitable for communication between only two devices.
• It supports fixed data rate agreed upon between devices initially before communication otherwise data will be garbled.		 • As number of slave increases, number of CS lines increases, this results in hardware complexity as number of pins required will increase.
 • To add a device in SPI requires one to add extra CS line and changes in software for particular device addressing is concerned.
 •Master and slave relationship can not be changed as usually done in I2C interface.
 •No flow control available in SPI. 		 •Increases complexity of the circuit when number of slaves and masters increases.
 •I2C interface is half duplex.
 •Requires software stack to control the protocol and hence it needs some processing overheads on microcontroller/microprocessor.
ReferenceRS232 Interface>>SPI Interface>>I2C Interface>>


CAN PROTOCOL

  • A typical automobile today has dozens of microcontrollers that communicate with each other via various CAN buses
  • key features
  • maximum data rate is :1Mbps at 40m, 125Kbps at 500m, 50Kbps at 1000m
  • circuit type is: Differential
  • physical layer: Twisted wire pair, 9 pin D-sub
  • Transmission Format: Asynchronus
  • Drive Voltage: High:2.75~4.5v, Low:0.5~2.25v
  • Differential :1.5v~3v
  • Network topology:Point to Point
  • Standard: ISO 11898/11519
  • in CAN, devices which are connected via CAN has priority level so that increasing signalling rate will not affect loosing the data so that data which has highest priority will monitor first(i.e collision is avoided )
  • CAN 2.O provides 11 bits identifiers means that it can provide 2^11 or 2048 messages indentifiers 
  • CAN 3.O provides 29 bits identifiers means that it can provide 2^29 or 537 million messages identifiers.
  • SOF: start of frames bit marks the start of message
  • 11bit indentifier is priority messages lowest is the binary value highest is the priority
  • RTR:remote transmission request it is dominant when it require information from another nodes. in this all nodes receives the request but identifier will determines the specific node
  • DLC: data length code it is for 4bit data
  • data: upto 64bit application data may be transmitted
  • CRC:cylic redundancy check(16 bit plus delimeter) it is used for checksum(number of bits are transmitted) of preceding application data for error check
  • ACK : (2bit) one is for acknowledge and other is delimiter bit
  • EOF: end of frame it is 7bit and disable the bit stuffing,indicating stuffing error when it is dominant
  • IFS: (7bit)interframe space it contain time required for microcontroller to receive bit properly inside the message buffer without error
  • The CAN specifications use the terms "dominant"bits and "recessive" bits where dominant is a logical 0 (actively driven to a voltage by the transmitter) and recessive is a logical 1 (passively returned to a voltage by a resistor). The idle state is represented by the recessive level (Logical 1). the dominant bit is always overwrite the recessive bit





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